Organize meetings and lead discussions between AMD and customers executives. Identify relevant agenda topics, develop and present content to executives. Implement a robust and comprehensive process to track all customer programs/designs across your accounts including objectives, schedules, key milestones and checkpoints, risks and issues. Drive execution of all programs a

Develop drivers for existing and upcoming Radeon GPUs. Debug challenging low level driver, hardware and OS issues. Optimize performance of important 3D graphics content, especially AAA PC games. Participate in a team culture that values open communication and strong commitment to code quality. Collaborate with hardware architects, OS architects, OEM customers, game develo

Work with a team of micro architects , designers, and firmware engineers for developing C++ compiler for innovative embedded RISC V CPUs Performance investigation under various graphics and ML workload Implement compiler optimization for chip design flows Implement mechanisms for hierarchical caching Collaborate with hardware architects to develop the approach and design

Train and finetune LLMs, LMMs, and image/video generation models. Improve on the state of the art LLMs, LMMs, and image/video generation models. Accelerate the training and inference speed of LLMs, LMMs, and image/video generation models. Research novel ML techniques and model architectures. Influence the direction of AMD AI platform. Publish your work at top tier venues.

Train and finetune LLMs/LMMs. Improve on the state of the art LLMs/LMMs.. Accelerate the training and inference speed of LLMs/LMMs. Research novel ML techniques and model architectures. Influence the direction of AMD AI platform. Publish your work at top tier venues. PREFERRED EXPERIENCE Experience in developing and debugging in Python. Experience in ML frameworks such as

Provide successful Cache Architecture development and execution using RTL Design, Verilog HDL, and scripting. Collaborate with Cache and CPU Architects to design, document, and execute optimized high performance Cache and Routing Fabric designs. Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure. Collaborate with

Refine our L1/L2/L3 processes for supporting the successful bring up of HPC and AI frameworks and models in partnership with our ODMs/OEMs in support of our end clients. Provide L2 software support and maintenance to all Instinct products through end of life. Oversee the development and application of tools and new methodologies required to support clients adopting our In

Develop/Modify tools and infrastructure used for performance analysis and studies Collaborate closely with multiple teams to deliver solutions and the technology to support them Look for the best out of the box solutions to solve problems or develop our own tools as needed PREFERRED EXPERIENCE Experience building and maintaining web applications is ideal, with a focus on

Working with a multi discipline and international team of engineers on design for debug (DFD) architecture, design and methodology initiatives. Performing DFD IP RTL design per micro architectural specifications. Performing DFD RTL integration, synthesis, equivalency checking, timing analysis and closure including defining design constraints. Writing and maintain DFD docu

Working with Architects and reads documentation to understand features to be implemented and verified Block level test plan creation with the fully understanding of Design Specification UVM block level test bench creation and maintenance Block level test creation in directed and random constraints covering all features usage model and corner cases, for both function and p

Collaborate with design, validation, and architecture teams for content coverage, test pattern development, validation, and debugging Develop test program infrastructure incorporating latest Best Known methods Solves sophisticated, novel, and non recurring problems; initiates significant changes to existing processes/ methods and leads development and implementation Ident

Development and implementation of AMD's Global Trade Policy strategy. Initially the role will focus on the US, with a particular emphasis on US Export Control rules and regulations. Coordination with Trade Compliance on export restrictions Collaboration with industry groups and like minded companies on trade policy Educating stakeholders within AMD on trade issues and con

Develop and run tools, infrastructure, processes and flows to enable functional verification in the emulation environment Develop emulation testbench components to stimulate and monitor the Device Under Test Maintain and improve emulation infrastructure and methodology. Develop and execute on verification test plans in emulation environments Develop, simulate and debug di

Lead post silicon validation planning & execution of functional and electrical testing for HBM Memory Build and cultivate strong relationships with key memory vendors, AMD engineering organizations including firmware, software, silicon design, manufacturing and other validation organization Recruit top talent to support the team's growth plans and develop the existing eng

Execute on RTL design and coding for various sections of the processor core pipeline and related logic. Collaborate with a team of hardware and software engineers to define the high level architecture. Participate in the definition of microarchitecture of next generation high performance processor cores. Contribute to design verification, synthesis, power reduction, timin